发明授权
- 专利标题： Multi-solder techniques and configurations for integrated circuit package assembly
- 专利标题（中）： 用于集成电路封装组装的多焊接技术和配置
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申请号： US14328599申请日： 2014-07-10
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公开(公告)号： US09257405B2公开(公告)日： 2016-02-09
- 发明人: Rajen S. Sidhu , Wei Hu , Carl L. Deppisch , Martha A. Dudek
- 申请人： INTEL CORPORATION
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Schwabe, Williamson & Wyatt, P.C.
- 主分类号： H01L23/12
- IPC分类号： H01L23/12 ; H01L23/00 ; B23K35/02 ; H01L23/498 ; H01L21/48 ; H01L23/31
摘要：
Embodiments of the present disclosure are directed towards multi-solder techniques and configurations for integrated circuit (IC) package assembly. In one embodiment, a method includes depositing a plurality of solder balls on a plurality of pads of a package substrate, the plurality of solder balls corresponding with the plurality of pads and performing a solder reflow process to form a solder joint between the plurality of solder balls and the plurality of pads. Individual solder balls of the plurality of solder balls include a first solder material and a second solder material, the first solder material having a liquidus temperature that is greater than a peak temperature of the solder reflow process and the second solder material having a liquidus temperature that is less than the peak temperature of the solder reflow process. Other embodiments may be described and/or claimed.
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