Invention Grant
- Patent Title: Multiple-patterning overlay decoupling method
- Patent Title (中): 多图案叠加去耦方法
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Application No.: US13328264Application Date: 2011-12-16
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Publication No.: US09134627B2Publication Date: 2015-09-15
- Inventor: Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
- Applicant: Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G03F7/20 ; H01L23/544

Abstract:
A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.
Public/Granted literature
- US20130157389A1 Multiple-Patterning Overlay Decoupling Method Public/Granted day:2013-06-20
Information query
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