Invention Grant
- Patent Title: Method of manufacturing three dimensional semiconductor memory device
- Patent Title (中): 制造三维半导体存储器件的方法
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Application No.: US14248003Application Date: 2014-04-08
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Publication No.: US09064736B2Publication Date: 2015-06-23
- Inventor: Joon-Suk Lee , Woong Lee , Hun-Hyeong Lim , Ki-Hyun Hwang
- Applicant: Joon-Suk Lee , Woong Lee , Hun-Hyeong Lim , Ki-Hyun Hwang
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2013-0120647 20131010
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L27/115

Abstract:
A method of manufacturing a three-dimensional semiconductor memory device is provided. The method includes alternately stacking a first insulation film, a first sacrificial film, alternating second insulation films and second sacrificial films, a third sacrificial film and a third insulation film on a substrate. A channel hole is formed to expose a portion of the substrate while passing through the first insulation film, the first sacrificial film, the second insulation films, the second sacrificial films, the third sacrificial film and the third insulation film. The method further includes forming a semiconductor pattern on the portion of the substrate exposed in the channel hole by epitaxial growth. Forming the semiconductor pattern includes forming a lower epitaxial film, doping an impurity into the lower epitaxial film, and forming an upper epitaxial film on the lower epitaxial film. Forming the lower epitaxial film, doping the impurity into the lower epitaxial film and forming the upper epitaxial film are all performed in-situ, and the semiconductor pattern includes a doped region and an undoped region.
Public/Granted literature
- US20150104916A1 Method of Manufacturing Three Dimensional Semiconductor Memory Device Public/Granted day:2015-04-16
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