发明授权
US08988471B2 Systems and methods for dynamic dwelling time for tuning display to reduce or eliminate mura artifact
有权
用于调整显示的动态住宅时间的系统和方法,以减少或消除mura伪影
- 专利标题: Systems and methods for dynamic dwelling time for tuning display to reduce or eliminate mura artifact
- 专利标题(中): 用于调整显示的动态住宅时间的系统和方法,以减少或消除mura伪影
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申请号: US13601801申请日: 2012-08-31
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公开(公告)号: US08988471B2公开(公告)日: 2015-03-24
- 发明人: Ahmad Al-Dahle , David A. Stronks , Hopil Bae
- 申请人: Ahmad Al-Dahle , David A. Stronks , Hopil Bae
- 申请人地址: US CA Cupertino
- 专利权人: Apple Inc.
- 当前专利权人: Apple Inc.
- 当前专利权人地址: US CA Cupertino
- 代理机构: Fletcher Yoder PC
- 主分类号: G09G5/10
- IPC分类号: G09G5/10
摘要:
Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated.
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