发明授权
- 专利标题: Low power serial link
- 专利标题(中): 低功率串行链路
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申请号: US13173576申请日: 2011-06-30
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公开(公告)号: US08964905B1公开(公告)日: 2015-02-24
- 发明人: Marc Loinaz
- 申请人: Marc Loinaz
- 申请人地址: US CA Irvine
- 专利权人: NetLogic Microsystems, Inc.
- 当前专利权人: NetLogic Microsystems, Inc.
- 当前专利权人地址: US CA Irvine
- 代理机构: Sterne, Kessler, Goldstein & Fox PLLC
- 主分类号: H03K5/159
- IPC分类号: H03K5/159
摘要:
The present invention relates to a low power serial link employing differential return-to-zero signaling. A receiver circuit consistent with some embodiments includes an input circuit for receiving differential serial data signals that form a differential return-to-zero signaling and a clock recovery circuit. The clock recovery circuit is coupled to the input circuit and includes a logic gate configured to generate a clock signal by using said differential serial data signals.
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