Invention Grant
US08952757B2 Amplifiers with enhanced power supply rejection ratio at the output stage 有权
在输出级具有增强的电源抑制比的放大器

Amplifiers with enhanced power supply rejection ratio at the output stage
Abstract:
An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.
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