Invention Grant
US08952757B2 Amplifiers with enhanced power supply rejection ratio at the output stage
有权
在输出级具有增强的电源抑制比的放大器
- Patent Title: Amplifiers with enhanced power supply rejection ratio at the output stage
- Patent Title (中): 在输出级具有增强的电源抑制比的放大器
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Application No.: US13922884Application Date: 2013-06-20
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Publication No.: US08952757B2Publication Date: 2015-02-10
- Inventor: Sung-Han Wen , Chien-Chung Yang
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: MediaTek Inc.
- Current Assignee: MediaTek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H03G3/10
- IPC: H03G3/10 ; H03G3/00 ; H03F1/30 ; H03F3/30

Abstract:
An amplifier circuit is disclosed. The amplifier circuit includes a detection circuit, a control amplifier circuit and an output stage. The detection circuit detects disturbances occurring in a first supply voltage and provides detection results. The control amplifier circuit controls a first voltage provided to a first control node and a second voltage provided to a second control node in response to the detection results. The output stage circuit includes a first output power transistor coupled to the control amplifier circuit at the first control node and a second output power transistor coupled to the control amplifier circuit at the second control node. The first voltage and the second voltage are controlled differently when a disturbance is detected to have occurred.
Public/Granted literature
- US20140015610A1 AMPLIFIERS WITH ENHANCED POWER SUPPLY REJECTION RATIO AT THE OUTPUT STAGE Public/Granted day:2014-01-16
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