Invention Grant
- Patent Title: Layout design for electron-beam high volume manufacturing
- Patent Title (中): 电子束大批量制造布局设计
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Application No.: US13657992Application Date: 2012-10-23
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Publication No.: US08949749B2Publication Date: 2015-02-03
- Inventor: Hung-Chun Wang , Shao-Yun Fang , Tzu-Chin Lin , Wen-Chun Huang , Ru-Gun Liu
- Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
The present disclosure relates to a method and apparatus to create a physical layout for electron-beam lithography, comprising defining a layout grid for a physical design, the layout grid further comprising vertical grid lines which coincide with stitching lines resulting from partitioning the physical design into a plurality of subfields. The physical design is assembled in accordance with design restrictions regarding interaction between design shapes and the layout grid. In some embodiments, the design restrictions are realized though layout restrictions. In some embodiments, the design restrictions are realized by shifting standard cells to minimize design shape interaction with the layout grid in a post-layout step. In some embodiments, the design restrictions are realized by exchanging positions between a plurality of standard cells for an exchange permutation which minimizes the number of interactions in a post-layout step. In some embodiments a routing grid is refined to rule out interactions between a subset of design constructs and the layout grid. Remaining design shape placement is then optimized along the routing grid relative to the stitching lines.
Public/Granted literature
- US20140115546A1 Layout Design for Electron-Beam High Volume Manufacturing Public/Granted day:2014-04-24
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