发明授权
- 专利标题： Nonvolatile logic array with built-in test result signal
- 专利标题（中）： 具有内置测试结果信号的非易失性逻辑阵列
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申请号： US13753771申请日： 2013-01-30
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公开(公告)号： US08897088B2公开(公告)日： 2014-11-25
- 发明人: Steven Craig Bartling , Sudhanshu Khanna
- 申请人： Texas Instruments Incorporated
- 申请人地址： US TX Dallas
- 专利权人： Texas Instrument Incorporated
- 当前专利权人： Texas Instrument Incorporated
- 当前专利权人地址： US TX Dallas
- 代理商 John R. Pessetto; Frederick J. Telecky, Jr.
- 主分类号： G11C29/50
- IPC分类号： G11C29/50 ; G11C29/08 ; G11C29/34 ; G11C11/401 ; G11C29/02
摘要：
A system on chip (SoC) provides a nonvolatile memory array that is configured as n rows by m columns of bit cells. Each of the bit cells is configured to store a bit of data. There are m bit lines each coupled to a corresponding one of the m columns of bit cells. There are m write drivers each coupled to a corresponding one of the m bit lines. An AND gate is coupled to the m bit lines and has an output line coupled to an input of a test controller on the SoC. An OR gate is coupled to the m bit lines and has an output line coupled to an input of the test controller.
公开/授权文献
- US20140211572A1 Nonvolatile Logic Array with Built-In Test Result Signal 公开/授权日：2014-07-31
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