发明授权
US08847565B2 Shunt regulator for adverse voltage/circuit conditions 有权
用于不利电压/电路条件的并联稳压器

  • 专利标题: Shunt regulator for adverse voltage/circuit conditions
  • 专利标题(中): 用于不利电压/电路条件的并联稳压器
  • 申请号: US13618444
    申请日: 2012-09-14
  • 公开(公告)号: US08847565B2
    公开(公告)日: 2014-09-30
  • 发明人: Madan Mohan Reddy Vemula
  • 申请人: Madan Mohan Reddy Vemula
  • 申请人地址: NL Eindhoven
  • 专利权人: NXP B.V.
  • 当前专利权人: NXP B.V.
  • 当前专利权人地址: NL Eindhoven
  • 主分类号: G05F1/00
  • IPC分类号: G05F1/00
Shunt regulator for adverse voltage/circuit conditions
摘要:
Low voltage circuits are protected from high voltage/current conditions, as may be implemented in accordance with one or more example embodiments. An additional/secondary shunt circuit/switch is implemented to shunt additional current as supply voltage steps or otherwise increases. In some implementations, the secondary shunt circuit includes a transistor having its drain coupled to its gate via a large capacitance that operates to maintain the gate voltage at about a constant level. This operates to facilitate the draining of additional current, and maintaining a low bandgap voltage supply level.
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