发明授权
US08791844B2 Modified dynamic element matching for reduced latency in a pipeline analog to digital converter 有权
改进的动态元素匹配,以减少流水线模数转换器的延迟

Modified dynamic element matching for reduced latency in a pipeline analog to digital converter
摘要:
A circuit in an analog-to-digital converter (ADC) includes an amplifier configured to receive an output of a backend DAC; a harmonic distortion correction circuit (HDC) coupled to the amplifier and configured to correct distortion components due to the residue amplifier present in a digital signal from the backend ADC, the HDC circuit providing an output to an adder, the adder receiving a coarse digital output from a coarse ADC; and a DAC noise cancellation circuit (DNC) configured to provide an output to the adder, wherein the DNC circuit is configured to correct distortion components due to the DAC present in the digital signal from the backend ADC; wherein the output of the adder is an ADC digital output and wherein the ADC digital output forms an input to the HDC and the DNC.
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