Invention Grant
- Patent Title: Bipolar junction transistors and memory arrays
- Patent Title (中): 双极结晶体管和存储器阵列
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Application No.: US13415288Application Date: 2012-03-08
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Publication No.: US08766235B2Publication Date: 2014-07-01
- Inventor: Federica Ottogalli , Luca Laurin
- Applicant: Federica Ottogalli , Luca Laurin
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/24

Abstract:
Some embodiments include methods of forming BJTs. A first type doped region is formed within semiconductor material. First and second trenches are formed within the semiconductor material to pattern an array of pedestals, and the trenches are filled with electrically insulative material. An upper portion of the first type doped region is counter-doped to form a first stack having a second type doped region over a first type doped region, and an upper portion of the first stack is then counter-doped to form a second stack having a second type doped region between a pair of first type doped regions. Some embodiments include a BJT array. A base implant region is between a pair of emitter/collector implant regions. Electrically insulative material is adjacent the base implant region, and contains at least about 7×1016 atoms/cm3 of base implant region dopant.
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