发明授权
US08755241B2 Method and apparatus for programming an anti-fuse element in a high-voltage integrated circuit
有权
用于在高压集成电路中编程抗熔丝元件的方法和装置
- 专利标题: Method and apparatus for programming an anti-fuse element in a high-voltage integrated circuit
- 专利标题(中): 用于在高压集成电路中编程抗熔丝元件的方法和装置
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申请号: US13656066申请日: 2012-10-19
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公开(公告)号: US08755241B2公开(公告)日: 2014-06-17
- 发明人: Sujit Banerjee , Giao Minh Pham
- 申请人: Power Integrations, Inc.
- 申请人地址: US CA San Jose
- 专利权人: Power Integrations, Inc.
- 当前专利权人: Power Integrations, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: The Law Offices of Bradley J. Bereznak
- 主分类号: G11C17/18
- IPC分类号: G11C17/18
摘要:
A method for programming a programmable block of a power IC device includes selecting an anti-fuse element of the programmable block to be programmed. The anti-fuse element includes first and second capacitive plates separated by a dielectric layer. A voltage pulse is then applied to a pin of the power IC device. The pin is connected to a drain of a high-voltage field-effect transistor (HVFET) that drives an external load via the pin during a normal operating mode of the power IC device. The voltage pulse, which is coupled to the first capacitive plate of the anti-fuse element, has a potential sufficiently high to cause a current to flow through the anti-fuse element that destroys at least a portion of the dielectric layer, thereby electrically shorting the first and second capacitive plates.
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