发明授权
US08743253B2 Method of controlling read address, physical information acquisition apparatus, and semiconductor device 失效
控制读取地址的方法,物理信息获取装置和半导体装置

  • 专利标题: Method of controlling read address, physical information acquisition apparatus, and semiconductor device
  • 专利标题(中): 控制读取地址的方法,物理信息获取装置和半导体装置
  • 申请号: US11214527
    申请日: 2005-08-30
  • 公开(公告)号: US08743253B2
    公开(公告)日: 2014-06-03
  • 发明人: Masafumi OkanoHiroki Ui
  • 申请人: Masafumi OkanoHiroki Ui
  • 申请人地址: JP Tokyo
  • 专利权人: Sony Corporation
  • 当前专利权人: Sony Corporation
  • 当前专利权人地址: JP Tokyo
  • 代理机构: Dentons US LLP
  • 优先权: JPP2004-255341 20040902
  • 主分类号: H04N3/14
  • IPC分类号: H04N3/14 H04N1/04
Method of controlling read address, physical information acquisition apparatus, and semiconductor device
摘要:
To reduce random noise caused by address setting in an apparatus that controls a read address of an image sensing device, without causing a significant increase in circuit complexity.A ring shift register sets a low-order address value depending on a value in steps of which an overall address value is incremented, and a Gray code counter sets a high-order address value. In the ring shift register, a carry from the lowest-order bit to the highest-order bit does not occur, and thus use of the ring shift register makes it possible to reduce the maximum number of toggled bits. The Gray code counter does not need to include a complicated circuit for switching the value in steps of which to increment the high-order address value. Thus, an overall address setting unit can be configured in a simple form without needing any complicated circuit such that addressing can be performed while maintaining the number of toggled bits within a small range and thus random noise generated in the addressing operation can be minimized.
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