发明授权
- 专利标题: Interconnected array of logic cells reconfigurable with intersecting interconnection topology
- 专利标题(中): 可互相连接的逻辑单元阵列可与交叉互连拓扑重构
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申请号: US13512967申请日: 2010-12-14
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公开(公告)号: US08742789B2公开(公告)日: 2014-06-03
- 发明人: Ian O'Connor , Nataliya Yakimets
- 申请人: Ian O'Connor , Nataliya Yakimets
- 申请人地址: FR Ecully Cedex FR Villeurbanne Cedex FR Paris FR Villeurbanne
- 专利权人: Ecole Centrale de Lyon,Universite Claude Bernard,Centre National de la Recherche Scientfique,Institut National des Sciences Appliquees de Lyon
- 当前专利权人: Ecole Centrale de Lyon,Universite Claude Bernard,Centre National de la Recherche Scientfique,Institut National des Sciences Appliquees de Lyon
- 当前专利权人地址: FR Ecully Cedex FR Villeurbanne Cedex FR Paris FR Villeurbanne
- 代理机构: Ladas & Parry LLP
- 优先权: FR0958957 20091214
- 国际申请: PCT/FR2010/052717 WO 20101214
- 国际公布: WO2011/080452 WO 20110707
- 主分类号: H01L25/00
- IPC分类号: H01L25/00 ; H03K19/177 ; G06F17/50
摘要:
An interconnected array of reconfigurable logic cells which carry out at least one logic function, externally connected to peripheral connection network equipped with switch boxes and connected to programmable input/output blocks. The logic cells are distributed in a first dimension in rows i with i=1 to d and a second dimension in columns j with j=1 to w, with d≦2 and w=2 or d=2 and w≦2, each logic cell including a second input, a second input, a first output and a second output, the first input of each logic cell and the first output of each logic cell being connected to the connection network, the second input and the second output of each logic cell being connected to other different column and row logic cells except for the first and last rows or columns for d>2 or w>2 respectively.
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