发明授权
- 专利标题: Programmable packet processor with flow resolution logic
- 专利标题(中): 具有流分辨率逻辑的可编程数据包处理器
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申请号: US13597060申请日: 2012-08-28
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公开(公告)号: US08724632B2公开(公告)日: 2014-05-13
- 发明人: Jim Cathey , Timothy S. Michels
- 申请人: Jim Cathey , Timothy S. Michels
- 申请人地址: FR Paris
- 专利权人: Alcatel Lucent
- 当前专利权人: Alcatel Lucent
- 当前专利权人地址: FR Paris
- 代理机构: Capitol Patent & Trademark Law Firm, PLLC
- 主分类号: H04L12/28
- IPC分类号: H04L12/28 ; H04L12/56 ; H04L12/54
摘要:
A programmable packet switching controller has a packet buffer, a pattern match module, a programmable packet classification engine and an application engine. The packet classification engine has a decision tree-based classification logic for classifying a packet. The application engine has a number of programmable sub-engines arrayed in a pipelined architecture. The sub-engines include a source lookup engine, a destination lookup engine and a disposition engine, which are used to make a disposition decision for the inbound packets in a processing pipeline.
公开/授权文献
- US20130034101A1 Programmable Packet Processor With Flow Resolution Logic 公开/授权日:2013-02-07
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