Invention Grant
- Patent Title: Reducing substrate warpage in semiconductor processing
- Patent Title (中): 降低半导体加工中的基板翘曲
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Application No.: US13349323Application Date: 2012-01-12
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Publication No.: US08691706B2Publication Date: 2014-04-08
- Inventor: Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
- Applicant: Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
System and method for reducing substrate warpage in a thermal process. An embodiment comprises pre-heating a substrate in a loadlock chamber before performing the thermal process of the substrate. After the thermal process, the substrate is cooled down in a loadlock chamber. The pre-heat and cool-down process reduces the warpage of the substrate caused by the differences in coefficients of thermal expansion (CTEs) of the materials that make up the substrate.
Public/Granted literature
- US20130183831A1 Reducing Substrate Warpage in Semiconductor Processing Public/Granted day:2013-07-18
Information query
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