Invention Grant
US08674452B2 Semiconductor device with lower metal layer thickness in PMOS region
有权
在PMOS区域具有较低金属层厚度的半导体器件
- Patent Title: Semiconductor device with lower metal layer thickness in PMOS region
- Patent Title (中): 在PMOS区域具有较低金属层厚度的半导体器件
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Application No.: US13167738Application Date: 2011-06-24
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Publication No.: US08674452B2Publication Date: 2014-03-18
- Inventor: Chin-Cheng Chien , Tzung-Ying Lee , Tsuo-Wen Lu , Shu-Yen Chan , Jei-Ming Chen , Yu-Min Lin , Chun-Wei Hsu
- Applicant: Chin-Cheng Chien , Tzung-Ying Lee , Tsuo-Wen Lu , Shu-Yen Chan , Jei-Ming Chen , Yu-Min Lin , Chun-Wei Hsu
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A semiconductor device includes: a substrate having a first region and a second region; a first gate structure disposed on the first region, wherein the first gate structure comprises a first high-k dielectric layer, a first work function metal layer, and a first metal layer disposed between the first high-k dielectric layer and the first work function metal layer; and a second gate structure disposed on the second region, wherein the second gate structure comprises a second high-k dielectric layer, a second work function metal layer, and a second metal layer disposed between the second high-k dielectric layer and the second work function metal layer, wherein the thickness of the second metal layer is lower than the thickness of the first metal layer.
Public/Granted literature
- US20120326238A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2012-12-27
Information query
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