发明授权
US08638110B2 High resolution circuit for converting capacitance-to-time deviation
有权
用于转换电容 - 时间偏差的高分辨率电路
- 专利标题: High resolution circuit for converting capacitance-to-time deviation
- 专利标题(中): 用于转换电容 - 时间偏差的高分辨率电路
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申请号: US12675111申请日: 2008-07-21
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公开(公告)号: US08638110B2公开(公告)日: 2014-01-28
- 发明人: Sung Sik Lee , Myung Lae Lee , Gunn Hwang , Chang Auck Choi
- 申请人: Sung Sik Lee , Myung Lae Lee , Gunn Hwang , Chang Auck Choi
- 申请人地址: KR Daejeon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejeon
- 优先权: KR10-2007-0087257 20070829
- 国际申请: PCT/KR2008/004252 WO 20080721
- 国际公布: WO2009/028798 WO 20090305
- 主分类号: G01R27/26
- IPC分类号: G01R27/26
摘要:
There is provided a high resolution circuit for converting a capacitance-to-time deviation including a capacitance deviation detecting unit generating two detection signals having a phase difference corresponding to variations of capacitance of an micro electro mechanical system (MEMS) sensor; a capacitance deviation amplifying unit dividing frequencies of the two detection signals to amplify the phase difference corresponding to the capacitance deviation; and a time signal generating unit generating a time signal having a pulse width corresponding to the amplified phase difference.
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