- 专利标题: Semiconductor device including latency counter
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申请号: US13317598申请日: 2011-10-24
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公开(公告)号: US08611177B2公开(公告)日: 2013-12-17
- 发明人: Hiroki Fujisawa
- 申请人: Hiroki Fujisawa
- 申请人地址: JP Tokyo
- 专利权人: Elpida Memory, Inc.
- 当前专利权人: Elpida Memory, Inc.
- 当前专利权人地址: JP Tokyo
- 代理机构: McGinn IP Law Group, PLLC
- 优先权: JP2010-257323 20101117
- 主分类号: G11C8/18
- IPC分类号: G11C8/18
摘要:
For example, a semiconductor device includes a first latency counter, which selects whether to give an odd-cycle latency to an internal command signal; and a second latency counter, which gives a latency to an internal command signal at intervals of two cycles. The latency counters are connected in series. Since the number of bits in control information, which is used to set a latency, is smaller than the types of settable latency as a result, it is possible to reduce wiring density.
公开/授权文献
- US20120120754A1 Semiconductor device including latency counter 公开/授权日:2012-05-17
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