发明授权
US08499259B2 Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof 有权
抛光估算/评估装置,过度抛光条件计算装置及其计算机可读的非暂时介质

  • 专利标题: Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof
  • 专利标题(中): 抛光估算/评估装置,过度抛光条件计算装置及其计算机可读的非暂时介质
  • 申请号: US13019778
    申请日: 2011-02-02
  • 公开(公告)号: US08499259B2
    公开(公告)日: 2013-07-30
  • 发明人: Daisuke Fukuda
  • 申请人: Daisuke Fukuda
  • 申请人地址: JP Kawasaki
  • 专利权人: Fujitsu Limited
  • 当前专利权人: Fujitsu Limited
  • 当前专利权人地址: JP Kawasaki
  • 代理机构: Fujitsu Patent Center
  • 优先权: JP2010-026352 20100209
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof
摘要:
A polishing estimation/evaluation device includes a dividing unit, an overpolished area extracting unit, and a dummy modifying unit. The dividing unit divides a layout of an integrated circuit into a plurality of partial areas. The overpolished area extracting unit refers to an overpolishing condition indicating whether overpolishing occurs in a vicinity of a partial area based on a wiring density in the partial area and a wiring density in surrounding areas of the partial area, and extracts a partial area where the overpolishing occurs from the plurality of partial areas obtained by the division by the dividing unit. The dummy modifying unit modifies dummy wiring in the partial area where the overpolishing occurs extracted by the overpolished area extracting unit and/or dummy wiring in surrounding areas of the partial area to reduce the number of partial areas where the overpolishing occurs.
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