发明授权
- 专利标题: Multi-level DRAM cell using CHC technology
- 专利标题(中): 使用CHC技术的多级DRAM单元
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申请号: US13046798申请日: 2011-03-14
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公开(公告)号: US08497550B2公开(公告)日: 2013-07-30
- 发明人: Werner Juengling
- 申请人: Werner Juengling
- 申请人地址: TW Kueishan, Tao-Yuan Hsien
- 专利权人: Nanya Technology Corp.
- 当前专利权人: Nanya Technology Corp.
- 当前专利权人地址: TW Kueishan, Tao-Yuan Hsien
- 代理商 Winston Hsu; Scott Margo
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
A DRAM memory cell includes: a first finFET structure; and a second finFET structure adjacent to the first finFET structure. The second finFET structure includes: a source follower transistor in a first fin of the second finFET structure; an access transistor in a second fin of the second fin FET structure; a write word line; and a read word line stacked above the write word line. When the read word line is fired high, the source follower transistor enables data to be read from the first finFET structure.
公开/授权文献
- US20120236629A1 MULTI-LEVEL DRAM CELL USING CHC TECHNOLOGY 公开/授权日:2012-09-20
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