发明授权
US08492901B2 Metal oxide semiconductor (MOS)-compatible high-aspect ratio through-wafer vias and low-stress configuration thereof
失效
金属氧化物半导体（MOS）兼容的高纵横比透晶片通孔及其低应力结构
- 专利标题： Metal oxide semiconductor (MOS)-compatible high-aspect ratio through-wafer vias and low-stress configuration thereof
- 专利标题（中）： 金属氧化物半导体（MOS）兼容的高纵横比透晶片通孔及其低应力结构
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申请号： US12614062申请日： 2009-11-06
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公开(公告)号： US08492901B2公开(公告)日： 2013-07-23
- 发明人: Bucknell C. Webb
- 申请人： Bucknell C. Webb
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Ryan, Mason & Lewis, LLP
- 代理商 Daniel P. Morris
- 主分类号： H01L23/538
- IPC分类号： H01L23/538
摘要：
A structure includes a wafer having a top wafer surface. The wafer defines an opening. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The wafer has a thickness in the first reference direction. The structure also includes a through-wafer via formed in the opening. The through-wafer via has a shape, when viewed in a plane perpendicular to the first reference direction and parallel to the top wafer surface, of at least one of a spiral and a C-shape. The through-wafer via has a height in the first reference direction essentially equal to the thickness of the wafer in the first reference direction. Manufacturing techniques are also disclosed.
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