Invention Grant
US08445327B2 Light-emitting diode package and wafer-level packaging process of light-emitting diode
有权
发光二极管封装和晶圆级封装工艺的发光二极管
- Patent Title: Light-emitting diode package and wafer-level packaging process of light-emitting diode
- Patent Title (中): 发光二极管封装和晶圆级封装工艺的发光二极管
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Application No.: US13403714Application Date: 2012-02-23
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Publication No.: US08445327B2Publication Date: 2013-05-21
- Inventor: Chia-En Lee , Cheng-Ta Kuo , Der-Ling Hsia
- Applicant: Chia-En Lee , Cheng-Ta Kuo , Der-Ling Hsia
- Applicant Address: TW Hsinchu
- Assignee: Lextar Electronics Corp.
- Current Assignee: Lextar Electronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodak, LLP
- Priority: TW98111840A 20090409
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.
Public/Granted literature
- US20120164768A1 Light-Emitting Diode Package and Wafer-Level Packaging Process of Light-Emitting Diode Public/Granted day:2012-06-28
Information query
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