发明授权
- 专利标题: Reducing resistivity in interconnect structures of integrated circuits
- 专利标题(中): 降低集成电路互连结构中的电阻率
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申请号: US13036599申请日: 2011-02-28
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公开(公告)号: US08426307B2公开(公告)日: 2013-04-23
- 发明人: Cheng-Lin Huang
- 申请人: Cheng-Lin Huang
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, an oxide-based barrier layer directly on sidewalls of the opening, and conductive materials filling the remaining portion of the opening.
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