发明授权
- 专利标题: Input/output circuit
- 专利标题(中): 输入/输出电路
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申请号: US13238664申请日: 2011-09-21
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公开(公告)号: US08410841B2公开(公告)日: 2013-04-02
- 发明人: Susumu Yamada
- 申请人: Susumu Yamada
- 申请人地址: US AZ Phoenix
- 专利权人: Semiconductor Components Industries, LLC.
- 当前专利权人: Semiconductor Components Industries, LLC.
- 当前专利权人地址: US AZ Phoenix
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP
- 优先权: JP2009-224992 20090929
- 主分类号: H03K17/687
- IPC分类号: H03K17/687 ; H03K17/00
摘要:
In some embodiments, an input/output (I/O) circuit sends and receives a high-level signal and a low-level signal via a coupling capacitance provided on a communication line. The I/O circuit includes a receiving portion including a first detection circuit arranged to detect one of the signals and a second detection circuit arranged to detect the other signal, a transmitting portion including a three-value output circuit configured to output one of signals consisting of a high-level signal, a low-level signal, and a high impedance signal, and a control circuit configured to control the receiving portion and the transmitting portion. The control circuit judges a level of an inputted signal depending on detection results of the first detection circuit and the second detection circuit in a receiving state and controls an output value of the three-value output circuit in a transmitting state.
公开/授权文献
- US20120007655A1 INPUT/OUTPUT CIRCUIT 公开/授权日:2012-01-12
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