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US08392659B2 Extending cache capacity on multiple-core processor systems 有权
在多核处理器系统上扩展缓存容量

Extending cache capacity on multiple-core processor systems
Abstract:
A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
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