发明授权
US08386712B2 Structure for supporting simultaneous storage of trace and standard cache lines
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用于支持跟踪和标准缓存行同时存储的结构
- 专利标题： Structure for supporting simultaneous storage of trace and standard cache lines
- 专利标题（中）： 用于支持跟踪和标准缓存行同时存储的结构
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申请号： US12116676申请日： 2008-05-07
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公开(公告)号： US08386712B2公开(公告)日： 2013-02-26
- 发明人: Gordon T. Davis , Richard W. Doing , John D. Jabusch , M V V Anil Krishna , Brett Olsson , Eric F. Robinson , Sumedh W. Sathaye , Jeffrey R. Summers
- 申请人： Gordon T. Davis , Richard W. Doing , John D. Jabusch , M V V Anil Krishna , Brett Olsson , Eric F. Robinson , Sumedh W. Sathaye , Jeffrey R. Summers
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Patterson & Sheridan LLP
- 主分类号： G06F12/00
- IPC分类号： G06F12/00 ; G06F13/00 ; G06F13/28
摘要：
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for a single unified level one instruction cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instructions consistent with conventional cache lines is provided. A mechanism is described for indexing into the cache, and selecting the desired line. Control is exercised over which lines are contained within the cache. Provision is made for selection between a trace line and a conventional line when both match during a tag compare step.
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