A signal processing circuit for compensating for an I/Q amplitude mismatch in which the amplitudes of I- and Q-components of output signals of a quadrature modulator are unequal to or for compensating for an I/Q phase mismatch in which the phase difference between the I- and the Q-components of output signals of the quadrature modulator deviates from 90 degrees. The signal processing circuit comprises an I/Q mismatch compensating part that corrects the amplitude or phase of an input signal based on the compensation amount for compensating for an I/Q amplitude mismatch or an I/Q phase mismatch and that inputs the corrected signal into a quadrature modulator; a test signal generating part that sequentially generates and inputs two sets of combined I- and Q-components of a test signal, which is an AC signal, to the I/Q mismatch compensating part; a detector that determines an amplitude of the envelope of an output signal of the quadrature modulator; a filter that passes those ones of output signals of the detector which have frequencies equal to or lower than a cutoff frequency; and a control part that derives an amplitude or phase compensation amount of the I/Q mismatch compensating part such that the output values of the filter at the time of generating the two respective sets of test signals are equal to each other, the control part then inputting the derived amplitude or phase compensation amount into the I/Q mismatch compensating part.