发明授权
- 专利标题: High speed latch circuit with metastability trap and filter
- 专利标题(中): 具有亚稳陷阱和滤波器的高速锁存电路
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申请号: US13036033申请日: 2011-02-28
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公开(公告)号: US08334712B2公开(公告)日: 2012-12-18
- 发明人: Avi Klein , Migel Jacubovski
- 申请人: Avi Klein , Migel Jacubovski
- 申请人地址: IL Hod Hasharon
- 专利权人: Microsemi Corp.—Analog Mixed Signal Group Ltd.
- 当前专利权人: Microsemi Corp.—Analog Mixed Signal Group Ltd.
- 当前专利权人地址: IL Hod Hasharon
- 代理商 Simon Kahn
- 主分类号: H03L7/00
- IPC分类号: H03L7/00
摘要:
A synchronizer constituted of a first and second set of three serially coupled latches coupled to a common clocking signal, the first and the ultimate latch of the first set responsive to a first edge of a common clocking signal and the penultimate latch responsive to an opposing edge of the common clocking signal, the second set being respectively responsive to the respective complementary edges of the clocking signal; an input lead arranged to receive a signal to be synchronized, the input lead coupled to the input of the first latch of the first set and to the input of the first latch of the second set; and a filter arranged to pass the output of each of the first set and the second set responsive to the penultimate latch of the set exhibiting a consistent output for two consecutive opposing edges.
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