发明授权
US08326905B2 Transversal filter circuit with a plurality of delay units, multiplexers, and full adders suited for a smaller decision feedback equalizer 失效
具有多个延迟单元,多路复用器和适合较小判决反馈均衡器的全加器的横向滤波器电路

  • 专利标题: Transversal filter circuit with a plurality of delay units, multiplexers, and full adders suited for a smaller decision feedback equalizer
  • 专利标题(中): 具有多个延迟单元,多路复用器和适合较小判决反馈均衡器的全加器的横向滤波器电路
  • 申请号: US12470972
    申请日: 2009-05-22
  • 公开(公告)号: US08326905B2
    公开(公告)日: 2012-12-04
  • 发明人: Shih-Yi YehRuei-Dar Fang
  • 申请人: Shih-Yi YehRuei-Dar Fang
  • 申请人地址: TW Hsinchu County
  • 专利权人: Ralink Technology Corporation
  • 当前专利权人: Ralink Technology Corporation
  • 当前专利权人地址: TW Hsinchu County
  • 代理机构: WPAT, P.C.
  • 代理商 Anthony King
  • 优先权: TW97128940A 20080731
  • 主分类号: H04L27/01
  • IPC分类号: H04L27/01 G06F17/10
Transversal filter circuit with a plurality of delay units, multiplexers, and full adders suited for a smaller decision feedback equalizer
摘要:
A transversal filter circuit comprises a plurality of delay units, a plurality of multiplexers and a plurality of full adders. The plurality of delay units is coupled in series to delay a two-bit input signal. The plurality of multiplexers is coupled to the plurality of delay units in a one-to-one manner, and outputs zero, a data signal, or the inverse of the data signal according to the output signals of the plurality of delay units. The plurality of full adders accumulates the outputs of the plurality of multiplexers and the MSB of the outputs of the plurality of the delay units.
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