Invention Grant
- Patent Title: Power-saving control circuit and method
- Patent Title (中): 省电控制电路及方法
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Application No.: US11612487Application Date: 2006-12-19
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Publication No.: US08321609B2Publication Date: 2012-11-27
- Inventor: Ming-Chieh Lin , Hsieh-Yi Wu
- Applicant: Ming-Chieh Lin , Hsieh-Yi Wu
- Applicant Address: TW Hsinchu
- Assignee: Novatek Microelectronics Corp.
- Current Assignee: Novatek Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW95133979A 20060914
- Main IPC: G06F3/00
- IPC: G06F3/00

Abstract:
A power-saving control circuit and method suitable for circuits including a first-in-first-out (FIFO) register is provided. In the present invention, a logic circuit is disposed between two circuit modules with data transmitted in between. When there is data input into the FIFO register, the logic circuit activates a clock signal of the circuit module in the receiving end for reading the data. When all the data stored in the FIFO register is read, the clock signal is turned off so that the power consumed by the clock signal is reduced without affecting the data transmitting efficiency and the purpose of power-saving is achieved.
Public/Granted literature
- US20080126713A1 POWER-SAVING CONTROL CIRCUIT AND METHOD Public/Granted day:2008-05-29
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