Invention Grant
- Patent Title: Reduction of etch microloading for through silicon vias
- Patent Title (中): 通过硅通孔减少蚀刻微加载
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Application No.: US12832184Application Date: 2010-07-08
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Publication No.: US08319336B2Publication Date: 2012-11-27
- Inventor: Hung-Pin Chang , Chen-Hua Yu
- Applicant: Hung-Pin Chang , Chen-Hua Yu
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman Ham & Berner, LLP
- Main IPC: H01L23/34
- IPC: H01L23/34

Abstract:
The patterns (or layout), and pattern densities of TSVs described above provide layout of TSVs that could be etched with reduced etch microloading effect(s) and with good within-die uniformity. The patterns and pattern densities of TSVs for different groups of TSVs (or physically separated groups, or groups with different functions) should be fairly close amongst different groups. Different groups of TSVs (or TSVs with different functions, or physically separated TSV groups) should have relatively close shapes, sizes, and depths to allow the aspect ratio of all TSVs to be within a controlled (and optimal) range. The size(s) and depths of TSVs should be carefully selected to optimize the etching time and the metal gap-fill time.
Public/Granted literature
- US20120007132A1 REDUCTION OF ETCH MICROLOADING FOR THROUGH SILICON VIAS Public/Granted day:2012-01-12
Information query
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