In an image processing apparatus, an image processor includes: a matrix switcher, wherein intersecting input and output lines are connected by crosspoint switches; a signal processing block connected to output lines on the upstream side, and input lines on the downstream side by reentry paths; and an output block connected to output lines on the upstream side. An external reentry settings unit sets a first and second port of the matrix switcher as external reentry output ports, the first port being a matrix switcher output port, and the second port being a matrix switcher input port. A reentry stage information generator generates reentry stage information, which indicates the stage of the internal signal processing path where a special function unit is logically positioned, and wherein the special function unit corresponds to the external reentry output ports of the signal processing block and the output block.