发明授权
- 专利标题: Programmable delay module testing device and methods thereof
- 专利标题(中): 可编程延迟模块测试装置及其方法
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申请号: US12366973申请日: 2009-02-06
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公开(公告)号: US08274272B2公开(公告)日: 2012-09-25
- 发明人: Gerald R. Talbot , Hanwoo C. Cho , Brian Amick
- 申请人: Gerald R. Talbot , Hanwoo C. Cho , Brian Amick
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: G01R25/00
- IPC分类号: G01R25/00 ; G01R31/02
摘要:
A data processing device is configured so that, in a test mode of operation, the phase of an output signal of a second programmable delay module (PDM) is based on the phase of the input signal of the first PDM. To test the first and second PDMs, the output signal of the first PDM is set to each of a first set of phases and the corresponding phase of the output signal of the second PDM is compared to determine whether the performance of the first and second PDMs match a specification. Accordingly, the first and second PDMs are qualified based on their relative performance, reducing the need for test structures that consume an undesirably large amount of area.
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