发明授权
- 专利标题: Burst mode clock and data recovery circuit and method
- 专利标题(中): 突发模式时钟和数据恢复电路及方法
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申请号: US11604748申请日: 2006-11-28
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公开(公告)号: US08243869B2公开(公告)日: 2012-08-14
- 发明人: Amiad Dvir , Raviv Weber , David Avishai , Alex Goldstein , Igor Elkanovich , Gal Sitton , Michael Balter
- 申请人: Amiad Dvir , Raviv Weber , David Avishai , Alex Goldstein , Igor Elkanovich , Gal Sitton , Michael Balter
- 申请人地址: IL
- 专利权人: Broadlight Ltd.
- 当前专利权人: Broadlight Ltd.
- 当前专利权人地址: IL
- 代理机构: Sterne, Kessler, Goldstein & Fox PLLC
- 主分类号: H03D3/24
- IPC分类号: H03D3/24
摘要:
Burst mode clock and data recovery (BCDR) circuit and method capable of fast data recovery of passive optical network (PON) traffic. An over-sampled data stream is generated from an input burst data signal and a phase interpolator generates sampling clock signals using a reference clock and phase information. A phase estimation unit (PEU) determines a phase error in the over-sampled data streams; and a phase retrieval unit sets the phase interpolator with the respective phase information of the input burst data signal prior to reception of the input burst data signal.
公开/授权文献
- US20080124092A1 Burst mode clock and data recovery circuit and method 公开/授权日:2008-05-29
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