A correlated double sampling (CDS) circuit for sampling first and second pixel signals, which are respectively transmitted via first and second data lines, in a pixel array. The CDS circuit includes first and second sampling circuits, an amplifier circuit and a control circuit. The control circuit controls the first sampling circuit to sample a reset level and a data level of the first pixel signal in a first sampling period, and controls the second sampling circuit to sample a reset level and a data level of the second pixel signal in a second sampling period. The control circuit controls the amplifier circuit to output the reset level and the data level of the first pixel signal in a first output period, and output the reset level and the data level of the second pixel signal in a second output period.