发明授权
- 专利标题: Method of forming a substrate having a plurality of insulator layers
- 专利标题(中): 形成具有多个绝缘体层的衬底的方法
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申请号: US12193842申请日: 2008-08-19
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公开(公告)号: US08136240B2公开(公告)日: 2012-03-20
- 发明人: Joseph Kuczynski , Kevin Albert Splittstoesser , Timothy Jerome Tofil , Paul Alan Vermilyea
- 申请人: Joseph Kuczynski , Kevin Albert Splittstoesser , Timothy Jerome Tofil , Paul Alan Vermilyea
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Matthew J. Bussan
- 主分类号: H01K3/00
- IPC分类号: H01K3/00
摘要:
A mechanism is disclosed for providing horizontally split vias in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first/second ones and third/fourth ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first/second conductive vias are plated onto the first through-hole and before third/fourth conductive vias are plated onto the second through-hole. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the conductive vias from extending substantially beyond their respective internal conductive traces, thereby horizontally spitting the two conductive vias plated onto each of the through-holes. This advantageously increases wiring density up to 2×.
公开/授权文献
- US20100044096A1 Horizontally Split Vias 公开/授权日:2010-02-25
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