知搜-全球专利检索

  1. 登录
  2. 注册
发明授权
US08112570B2 Pipelined buffer interconnect with trigger core controller 有权
与触发核心控制器的流水线缓冲器互连

Pipelined buffer interconnect with trigger core controller
摘要：
A method and system to transfer a data stream from a data source to a data sink are described herein. The system comprises a trigger core, a plurality of dedicated buffers and a plurality of dedicated buses coupled to the plurality of buffers, trigger core, the data source and the data sink. In response to receiving a request for a data transfer from a data source to a data sink, the trigger core assigns a first buffer and a first bus to the data source for writing data, locks the first buffer and first bus, releases the first buffer and the first bus upon indication from the data source of completion of data transfer to the first buffer, assigns the first buffer and first bus to the data sink for reading data and assigns a second buffer and second bus to the data source for writing data thereby pipelining the data transfer from the data source to the data sink.
摘要（中）：

本文描述了将数据流从数据源传送到数据宿的方法和系统。 该系统包括触发核心，多个专用缓冲器和耦合到多个缓冲器，触发核心，数据源和数据宿的多个专用总线。 响应于接收到从数据源到数据宿的数据传输的请求，触发核心向数据源分配第一缓冲器和第一总线以写入数据，锁定第一缓冲器和第一总线，释放第一缓冲器 并且在从数据传送完成数据源指示到第一缓冲器之后，将第一总线分配给第一缓冲器和第一总线到数据接收器以读取数据，并将第二缓冲器和第二总线分配给数据源以写入数据，从而 将数据传输从数据源流水线到数据接收器。

公开/授权文献
信息查询
Espacenet
0/0