发明授权
- 专利标题: Process controller for semiconductor manufacturing, utilizing dangerous pattern identification and process capability determination
- 专利标题(中): 用于半导体制造的过程控制器,利用危险模式识别和过程能力确定
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申请号: US12354574申请日: 2009-01-15
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公开(公告)号: US08112167B2公开(公告)日: 2012-02-07
- 发明人: Ayako Endo , Kenji Yoshida , Toshiya Kotani , Satoshi Tanaka
- 申请人: Ayako Endo , Kenji Yoshida , Toshiya Kotani , Satoshi Tanaka
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 优先权: JP2008-009218 20080118
- 主分类号: G06F19/00
- IPC分类号: G06F19/00 ; G06F17/50
摘要:
A process control method comprises adjusting a process condition in consideration of a performance variation among a plurality of manufacturing apparatuses, the performance variation affecting a finished shape of a pattern used to manufacture a semiconductor device, running a simulation of the finished shape under the adjusted process condition, extracting a dangerous point of the pattern affecting satisfaction from the result of the simulation, comparing a first process capability serving as a judgment standard to find whether a production schedule of the device is achieved with a second capability serving to form a dangerous pattern containing the dangerous point, and improving the second process when the second process capability is lower than the first process capability.
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