Invention Grant
US08049287B2 Substrate-level assembly for an integrated device, manufacturing process thereof and related integrated device 有权
集成器件的基板级组装,其制造工艺和相关的集成器件

Substrate-level assembly for an integrated device, manufacturing process thereof and related integrated device
Abstract:
A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidly isolated from the first empty space, is provided over the respective membrane of the further integrated device.
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