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发明授权
US07989848B2 Semiconductor device having at least four side-by-side electrodes of equal length and equal pitch with at least two transistor connections to power or ground 有权
具有至少四个具有相等长度和等间距的并排电极的半导体器件，至少两个晶体管连接到电源或接地

Semiconductor device having at least four side-by-side electrodes of equal length and equal pitch with at least two transistor connections to power or ground
摘要：
A substrate portion of a semiconductor device is formed to include a plurality of diffusion regions that are defined in a non-symmetrical manner relative to a virtual line defined to bisect the substrate portion. A gate electrode level region is formed above the substrate portion to include a number of conductive features defined to extend in only a first parallel direction. Each of the number of conductive features within the gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature. The conductive features within the gate electrode level region are defined along at least four different virtual lines of extent in the first parallel direction. A width size of the conductive features within the gate electrode level region is measured perpendicular to the first parallel direction and is less than a wavelength of light used in a photolithography process to fabricate the conductive features.
摘要（中）：

半导体器件的衬底部分被形成为包括相对于被限定为平分衬底部分的虚拟线以非对称方式限定的多个扩散区域。 栅极电极水平区域形成在衬底部分之上，以包括限定为仅沿第一平行方向延伸的多个导电特征。 栅极电平区域内的多个导电特征中的每一个由相应的起始矩形布局特征制成。 栅电极电平区域内的导电特征沿着沿着第一平行方向的至少四个不同的虚拟线限定。 栅极电极区域内的导电特征的宽度尺寸是垂直于第一平行方向测量的，并且小于在光刻工艺中用于制造导电特征的光的波长。

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