发明授权
US07977706B2 Tri-gate field-effect transistors formed by aspect ratio trapping 有权
通过纵横比捕获形成的三栅极场效应晶体管

Tri-gate field-effect transistors formed by aspect ratio trapping
摘要:
Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.
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