Techniques for supporting synchronization in wireless communication are described. A Node B generates a primary synchronization code (PSC) having a length of L chips based on a first inner sequence and a first outer sequence, where L is less than 256. The Node B also generates a sequence of secondary synchronization codes (SSCs) based on a second inner sequence and a second outer sequence, with each SSC having a length of L chips. L may be equal to 64, and the PSC and SSCs may have lengths of 64 chips. The Node B sends the PSC in each slot of each frame and sends the sequence of SSCs in each frame, one SSC in each slot. A user equipment (UE) detects for the PSC and then detects for the sequence of SSCs using slot timing from the PSC detection. The UE may perform PSC detection using correlation results for the SSCs.