发明授权
US07925950B2 Implementing enhanced array access time tracking with logic built in self test of dynamic memory and random logic
有权
实现增强的阵列访问时间跟踪，内置动态内存和随机逻辑的自检逻辑
- 专利标题： Implementing enhanced array access time tracking with logic built in self test of dynamic memory and random logic
- 专利标题（中）： 实现增强的阵列访问时间跟踪，内置动态内存和随机逻辑的自检逻辑
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申请号： US12393156申请日： 2009-02-26
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公开(公告)号： US07925950B2公开(公告)日： 2011-04-12
- 发明人: Todd Alan Christensen , Peter Thomas Freiburger , Jesse Daniel Smith
- 申请人： Todd Alan Christensen , Peter Thomas Freiburger , Jesse Daniel Smith
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理商 Joan Pennington
- 主分类号： G01R31/28
- IPC分类号： G01R31/28
摘要：
A method and circuit for implementing substantially perfect array access time tracking with Logic Built In Self Test (LBIST) diagnostics of dynamic memory array and random logic, and a design structure on which the subject circuit resides are provided. The dynamic memory array is initialized to a state for the longest read time for each bit and the dynamic memory array is forced into a read only mode. During LBIST diagnostics with the array in the read only mode, the array outputs are combined with the data inputs to provide random switching data on the array outputs to the random logic.
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