发明授权
- 专利标题: Reference buffer circuit
- 专利标题(中): 参考缓冲电路
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申请号: US12123550申请日: 2008-05-20
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公开(公告)号: US07924087B2公开(公告)日: 2011-04-12
- 发明人: Wei-Hsuan Tu , Tzung-Hung Kang
- 申请人: Wei-Hsuan Tu , Tzung-Hung Kang
- 申请人地址: TW Hsin-Chu
- 专利权人: Mediatek Inc.
- 当前专利权人: Mediatek Inc.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Thomas | Kayden
- 主分类号: G05F1/10
- IPC分类号: G05F1/10
摘要:
A reference buffer circuit with high driving capability is disclosed. In which, a buffering stage has a first NMOS transistor and a first PMOS transistor to provide high and low tracking voltages respectively based on a high input voltage and a low input voltage. A first driving stage is driven by the high and low tracking voltages to output a first high output voltage and a first low output voltage. A body of the first PMOS transistor is tied to a first bias voltage lower than a supply voltage for the buffering and first driving stages.
公开/授权文献
- US20090289614A1 REFERENCE BUFFER CIRCUIT 公开/授权日:2009-11-26
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