发明授权
US07915726B2 Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices
有权
用于微电子管芯的互连衬底，在这种衬底中形成过孔的方法，以及用于封装微电子器件的方法
- 专利标题： Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices
- 专利标题（中）： 用于微电子管芯的互连衬底，在这种衬底中形成过孔的方法，以及用于封装微电子器件的方法
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申请号： US11969300申请日： 2008-01-04
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公开(公告)号： US07915726B2公开(公告)日： 2011-03-29
- 发明人: Chin Hui Chong , Choon Kuan Lee , David J. Corisis
- 申请人： Chin Hui Chong , Choon Kuan Lee , David J. Corisis
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Perkins Coie LLP
- 主分类号： H01L21/311
- IPC分类号： H01L21/311
摘要：
Substrates for mounting microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices are disclosed herein. A method of manufacturing a substrate in accordance with one embodiment of the invention includes forming a conductive trace on a first side of a sheet of non-conductive material, and forming a via through the non-conductive material from a second side of the sheet to the conductive trace. The method further includes removing a section of the non-conductive material to form an edge of the non-conductive material extending across at least a portion of the via. In one embodiment, forming the edge across the via exposes at least a portion of the second conductive trace for subsequent attachment to a terminal on a microelectronic die.
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