发明授权
US07911819B2 Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
有权
用于物理布局的装置和方法,用于同时辅助可访问的存储器模块
- 专利标题: Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
- 专利标题(中): 用于物理布局的装置和方法,用于同时辅助可访问的存储器模块
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申请号: US12179423申请日: 2008-07-24
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公开(公告)号: US07911819B2公开(公告)日: 2011-03-22
- 发明人: Terry R. Lee , Joseph M. Jeddeloh
- 申请人: Terry R. Lee , Joseph M. Jeddeloh
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Dorsey & Whitney LLP
- 主分类号: G11C11/401
- IPC分类号: G11C11/401
摘要:
A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.
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