发明授权
US07910419B2 SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness
有权
具有自对准接地面的SOI晶体管和可变厚度的栅极和掩埋氧化物
- 专利标题： SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness
- 专利标题（中）： 具有自对准接地面的SOI晶体管和可变厚度的栅极和掩埋氧化物
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申请号： US12483037申请日： 2009-06-11
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公开(公告)号： US07910419B2公开(公告)日： 2011-03-22
- 发明人: Claire Fenouillet-Beranger , Philippe Coronel
- 申请人： Claire Fenouillet-Beranger , Philippe Coronel
- 申请人地址： FR Paris
- 专利权人： Commissariat a l'Energie Atomique
- 当前专利权人： Commissariat a l'Energie Atomique
- 当前专利权人地址： FR Paris
- 代理机构： Nixon Peabody LLP
- 优先权： FR0853868 20080611
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/8234
摘要：
A method for making a transistor with self-aligned gate and ground plane includes forming a stack, on one face of a semi-conductor substrate, the stack including an organometallic layer and a dielectric layer. The method also includes exposing a part of the organometallic layer, a portion of the organometallic layer different to the exposed part being protected from the electron beams by a mask, the shape and the dimensions of a section, in a plane parallel to the face of the substrate, of the gate of the transistor being substantially equal to the shape and to the dimensions of a section of the organometallic portion in said plane. The method also includes removing the exposed part, and forming dielectric portions in empty spaces formed by the removal of the exposed part of the organometallic layer, around the organometallic portion.
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