A structure for measuring both interconnect resistance and capacitance. The structure comprises a plurality of metallic interconnects, a first circuit for measuring capacitance charging current at a first interconnect and a second circuit for measuring the voltage drop between two positions at a second interconnect. The first circuit includes two electrically connected pseudo-inverters. Two control signals are fed into the two pseudo-inverters such that their associated capacitances are charged and discharged periodically. The first interconnect capacitance is determined by measuring the difference of charging currents between the two pseudo-inverters. A constant current flows through the second circuit and the interconnect resistance is determined by the voltage drop and the constant current.