发明授权
US07839313B2 Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters
有权
校正M通道时间交错模数转换器中的偏移,增益和相位误差
- 专利标题: Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters
- 专利标题(中): 校正M通道时间交错模数转换器中的偏移,增益和相位误差
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申请号: US12691449申请日: 2010-01-21
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公开(公告)号: US07839313B2公开(公告)日: 2010-11-23
- 发明人: Sunder S. Kidambi
- 申请人: Sunder S. Kidambi
- 申请人地址: US CA Milpitas
- 专利权人: Intersil Americas, Inc.
- 当前专利权人: Intersil Americas, Inc.
- 当前专利权人地址: US CA Milpitas
- 代理机构: Hamilton, Brook, Smith & Reynolds, P.C.
- 主分类号: H03M1/06
- IPC分类号: H03M1/06
摘要:
Techniques for correcting component mismatches in an M-channel time-interleaved Analog to Digital Converter (ADC). In order to obtain an error measure for offset, gain or phase, errors, outputs from each ADC are either summed or averaged over No samples. Calling each of the sums or averages as Xk where k=1, 2, . . . , M, there are M such values as a result. A single value representing the mean of these M values, Xmean, is chosen as a reference value. The offset, gain and phase errors for the M different ADCs are then obtained from Xk−Xmean. The sign of each offset error, i.e., sign (Xk−Xmean), is then used to drive an adaptive algorithm whose output represents an offset correction value for the corresponding ADC. The offset, gain, and phase correction outputs from the adaptive algorithm is fed to an array of Digital-to-Analog converters (DACs) whose outputs are voltages or currents that directly or indirectly controls the offset, gain or phase setting of each individual ADC. Thus, there are M different offset, gain and phase error signals and M different adaptive algorithms operating in conjunction with M different DACs providing offset control signals to M different ADCs. In certain embodiments, spur frequencies can be reduced with the use of notch filters.
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